/*!
    \file    change log.txt
    \brief   change log for GD32H75E demo

    \version 2026-02-26, V1.6.0, demo for GD32H75E
*/

/*
    Copyright (c) 2026, GigaDevice Semiconductor Inc.

    Redistribution and use in source and binary forms, with or without modification,
are permitted provided that the following conditions are met:

    1. Redistributions of source code must retain the above copyright notice, this
       list of conditions and the following disclaimer.
    2. Redistributions in binary form must reproduce the above copyright notice,
       this list of conditions and the following disclaimer in the documentation
       and/or other materials provided with the distribution.
    3. Neither the name of the copyright holder nor the names of its contributors
       may be used to endorse or promote products derived from this software without
       specific prior written permission.

    THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR
PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY
OF SUCH DAMAGE.
*/

******************* V1.1.0 2026-02-26 ************************************************************************************
______________________Common______________________________________________________________________________________________
Fix file:
..\GD32H75E_Demo_Suites\GD32H75E_Firmware_Library
fix reason:
Update the firmware library version to V1.3.0.

Fix file:
..\GD32H75E_Demo_Suites\GD32H75EY_EVAL_Demo_Suites\Utilities
fix reason:
Update the gd32h75ey_eval.c and gd32h75ey_eval.h

Fix file:
Add GD32EmbeddedBuilder project

______________________CAN______________________________________________________________________________________________
Fix file:
..\GD32H75E_Demo_Suites\GD32H75EY_EVAL_Demo_Suites\Project\15_CAN_Network\gd32h75e_it.c
fix reason:
Fixed the issue of repeatedly clearing the email flag
V1.0.0:
void CAN0_Message_IRQHandler(void)
{
    if(RESET != can_interrupt_flag_get(CAN0, CAN_INT_FLAG_MB8)) {
        can_interrupt_flag_clear(CAN0, CAN_INT_FLAG_MB8);
        /* check the receive message */
        can_mailbox_receive_data_read(CAN0, 8U, &mailbox_receive_message);
        can0_mailbox_receive_flag = SET;
    }
    if(RESET != can_interrupt_flag_get(CAN0, CAN_INT_FLAG_FIFO_AVAILABLE)) {
        can_rx_fifo_read(CAN0, &fifo_receive_message);
        can0_fifo_receive_flag = SET;
    }
}
V1.1.0:
void CAN0_Message_IRQHandler(void)
{
    if(RESET != can_interrupt_flag_get(CAN0, CAN_INT_FLAG_MB8)) {
        /* read the receive message */
        can_mailbox_receive_data_read(CAN0, 8U, &mailbox_receive_message);
        can0_mailbox_receive_flag = SET;
    }
    if(RESET != can_interrupt_flag_get(CAN0, CAN_INT_FLAG_FIFO_AVAILABLE)) {
        /* read the receive message */
        can_rx_fifo_read(CAN0, &fifo_receive_message);
        can0_fifo_receive_flag = SET;
    }
}

______________________ADC______________________________________________________________________________________________
Fix file:
..\GD32H75E_Demo_Suites\GD32H75EY_EVAL_Demo_Suites\Project\08_ADC0_ADC1_Follow_Up_Mode\main.c
..\GD32H75E_Demo_Suites\GD32H75EY_EVAL_Demo_Suites\Project\09_ADC0_ADC1_Routine_Parallel_Mode\main.c
fix reason:
TRIGSEL_OUTPUT_ADC0_REGTRG to TRIGSEL_OUTPUT_ADC0_ROUTRG

V1.0.0:
trigsel_init(TRIGSEL_OUTPUT_ADC0_REGTRG, TRIGSEL_INPUT_TIMER1_CH1);
V1.1.0:
trigsel_init(TRIGSEL_OUTPUT_ADC0_ROUTRG, TRIGSEL_INPUT_TIMER1_CH1);

______________________RCU______________________________________________________________________________________________
Fix file:
..\GD32H75E_Demo_Suites\GD32H75EY_EVAL_Demo_Suites\Project\16_RCU_Clock_Out\main.c
fix reason: delete mpu_config()

______________________EtherCAT______________________________________________________________________________________________
Fix file:
..\GD32H75E_Demo_Suites\GD32H75EY_EVAL_Demo_Suites\Project\23_EtherCAT\inc\gdesc.h
..\GD32H75E_Demo_Suites\GD32H75EY_EVAL_Demo_Suites\Project\23_EtherCAT\src\esc_exti.c
..\GD32H75E_Demo_Suites\GD32H75EY_EVAL_Demo_Suites\Project\23_EtherCAT\src\esc_timer.c
..\GD32H75E_Demo_Suites\GD32H75EY_EVAL_Demo_Suites\Project\23_EtherCAT\src\gdesc.c
fix reason: update files

______________________USB______________________________________________________________________________________________
Fix file:
..\GD32H75E_Demo_Suites\GD32H75EY_EVAL_Demo_Suites\Project\22_Host_HID\src\gd32h75e_it.c
fix reason: 

V1.0.0:
/* local function prototypes ('static') */
static void resume_mcu_clk(void);
V1.1.0:
#if USB_LOW_POWER

/* local function prototypes ('static') */
static void resume_mcu_clk(void);

#endif /* USB_LOW_POWER */

V1.0.0:
/*!
    \brief      resume MCU clock
    \param[in]  none
    \param[out] none
    \retval     none
*/
static void resume_mcu_clk(void)
{
    /* enable HXTAL */
    rcu_osci_on(RCU_HXTAL);

    /* wait till HXTAL is ready */
    while(RESET == rcu_flag_get(RCU_FLAG_HXTALSTB)) {
    }

    /* enable PLL */
    rcu_osci_on(RCU_PLL0_CK);

    /* wait till PLL is ready */
    while(RESET == rcu_flag_get(RCU_FLAG_PLL0STB)) {
    }

    /* select PLL as system clock source */
    rcu_system_clock_source_config(RCU_CKSYSSRC_PLL0P);

    /* wait till PLL is used as system clock source */
    while(RCU_SCSS_PLL0P != rcu_system_clock_source_get()) {
    }
}
V1.1.0:
#if USB_LOW_POWER

/*!
    \brief      resume MCU clock
    \param[in]  none
    \param[out] none
    \retval     none
*/
static void resume_mcu_clk(void)
{
    /* enable HXTAL */
    rcu_osci_on(RCU_HXTAL);

    /* wait till HXTAL is ready */
    while(RESET == rcu_flag_get(RCU_FLAG_HXTALSTB)) {
    }

    /* enable PLL */
    rcu_osci_on(RCU_PLL0_CK);

    /* wait till PLL is ready */
    while(RESET == rcu_flag_get(RCU_FLAG_PLL0STB)) {
    }

    /* select PLL as system clock source */
    rcu_system_clock_source_config(RCU_CKSYSSRC_PLL0P);

    /* wait till PLL is used as system clock source */
    while(RCU_SCSS_PLL0P != rcu_system_clock_source_get()) {
    }
}

#endif /* USB_LOW_POWER */
__________________________________________________________________________________________________________________________
